Current Research
Using Graphical Processing Units for Enhancement of Metrology Systems
Principal investigator:
Graduate students:
Koushik Aravalli, Sham Panyam, Jeremy Carter
Sponsor:
National Science Foundation
Brief abstract:
This research targets the development of specialized metrology routines capable of utilizing new commercially available hardware systems to accelerate the data processing aspects of coordinate metrology. In particular, graphical processor units (GPUs) that have become increasingly more popular and powerful due to the video game industry will be used for the high-speed, high-precision vector floating point calculations that are the foundation for coordinate metrology.
Impact:
The impact of the proposed work is twofold. First the use of the GPU and FPGA combination will provide an excellent demonstration of the utility and capabilities of these two systems (both combined and separate). The demonstration of the systems in conjunction with the well-documented approach to utilizing them will provide an excellent foundation for other users to employ the advantages of these systems in their own research that may be outside of the metrology area. This is critical, in particular for the GPUs, as they are extremely cost effective (most computers already have some form of GPU on them). The second impact is the ability to rapidly analyze large quantities of inspection data. This ability is particularly critical in the micro and nano fabrication areas where new developments in hardware have resulted in extremely high data generation rates, resulting in a quality control bottleneck due to data processing. Furthermore, any field requiring large-scale, three- or four- element vector floating point processing will benefit from this work. The results of this research will also be integrated into undergraduate and graduate courses in the areas of manufacturing, metrology and numerical methods.
Project schedule:
August 2007 to August 2009
Preliminary results:
Work has been completed to demonstrate the application of computer graphics methodology and graphical processing unit (GPU) optimization and programmability to numerically controlled tool path generation. The basic proposed algorithm has been implemented to take advantage of the GPU depth buffer. This algorithm automatically generates a simple alternating raster path over the part surface for a mesh-specified model. Undercut detection and prevention of gouging for roughing passes are inherent to the algorithm. A series of stair-stepped roughing passes, based upon given tool sizes and maximum cutting depths, may be generated. Also, a finishing pass may be generated directly across the tool's surface. The accuracy of the finishing pass is enhanced by the addition of fragment shader programs that allow for tool nose compensation at multiple points over each pixel. Current work is aimed at determining the amount of error to be expected by the mesh tessellation and the discretization of the surface using the depth buffer. Also, initial results are being submitted for publication in appropriate journals.
